There are a few subquestions that I've had trouble finding numbers on with a quick search. Asking these questions mostly because they seem important for forecasting compute trends.

  • How many units of each model (i.e A100, 3090, etc) does NVIDIA make per month? 
  • Which of these use the same dies but have constrained supply ratios due to binning? What do these ratios look like/can they change if NVIDIA decides to focus on high end GPUs?
  • How much of the total global silicon capacity at the latest process node does this take up? How hard would it be for NVIDIA to scale up by squeezing out other silicon usages?
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How much of the total global silicon capacity at the latest process node does this take up? How hard would it be for NVIDIA to scale up by squeezing out other silicon usages?

Nvidia is spending around $4B per quarter in cost of revenue, which presumably mostly just goes to TSMC, which has quarterly revenue around $16B recently, so Nvidia is currently buying about 25% of TSMC's total capacity. The new Nvidia Hopper/Lovelace is using TMSC 4N - which is an nvidia-GPU specific process node.

TSMC has half of the entire global foundry market, so Nvidia is already buying about 12% or so of total world supply, which puts some initial rough bounds on scaling. However nvidia is purchasing a much larger fraction of the total high logic density supply, if you want to slice it more finely (the other big uses seem to be mostly cell phones).

1 comment, sorted by Click to highlight new comments since: Today at 12:29 AM

You probably found this already, but the different dies are mentioned here under GPU chip:

The previous generation RTX 30xx series were on Samsung 8nm node while A100 used TSMC 7nm. RTX 40xx series is currently planned on TSMC 4nm. The only other company advertising a 4nm process node is Samsung but they seem to be having troubles:

... the new Snapdragon 8+ Gen 1 is essentially the original Snapdragon 8 Gen 1 ported over from Samsung’s 4nm line over to one of TSMC’s 4nm lines. Under more normal circumstances, this kind of a shift would likely be unremarkable – or at most, an amusing exercise in looking for edge cases – however for Qualcomm’s flagship SoC, the matter is more significant.

While official sources and statements on the quality of Samsung’s 4nm process are few and far between, unofficially, it’s become clear that Samsung’s 4nm process hasn’t lived up to expectations. This has caused a cascading impact on the chips made on the process node, leading to the original Snapdragon 8 Gen 1 developing an affinity for power consumption, and Samsung’s own Exynos 2200 not faring any better. Conversely, by all accounts TSMC’s N4 process is looking great, with the optically shrunk node building off of TSMC’s already successful and very performant 5nm technologies. As a result of this performance gap between Samsung and TSMC’s 4nm nodes, Qualcomm is taking the unusual step of (essentially) porting their high-end SoC over to TSMC’s fab. Which, although not strictly necessary – Qualcomm carries a lot of momentum and the 8 Gen 1 has been selling well – is certainly a prudent move for the company. Qualcomm is facing especially stiff competition this generation from MediaTek, whose flagship-level Dimensity 9000 SoC was the lead product for TSMC’s 4nm node. And that leaves MediaTek with a distinct advantage against the original 8 Gen 1, one that Qualcomm would be very happy to nullify.

The Apple A16 chip (the one in iPhone 14) would be the largest customer of TSMC 4nm by my guess. Very few chips use the 4nm process node.

The folks over at Anandtech might be able to answer this better. You could also try reaching out to Dr.Ian Cutress on Twitter.

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