We don't need to guess, because 2016 southern Taiwan earthquake happened on 2016-02-06. Here is the official press release from TSMC: TSMC Details Earthquake Impact, Updates 1Q'16 Guidance. This should provide the baseline for the case of typical big earthquakes in Taiwan.
I would summarize this as: TSMC has three big fab sites in Taiwan: Hsinchu, Taichung, and Tainan. (You can basically think these as northern/central/southern Taiwan.) Earthquakes affecting one site won't affect other sites, and three sites are of similar size. So the expected effect is 1/3 capacity delayed up to 50 days.
In a worse case, all wafers being processed could have been trashed. This should produce delay equal to cycle time, which is very secret, but the usual estimate is 100 days. (1 day per layer, and 100 layers in the latest process.) In an even worse case, all fabs could have been trashed. This should produce delay equal to construction time, which historically has been roughly three years.
Thanks! So this shouldn't be taken as a significant source of delays, but it isn't nothing, either. Good to know.
Briefly and without any research myself, I learned today that Taiwan, where most of the most advanced chip fabs are, is very prone to earthquakes. Which are bad for very-high-precision manufacturing.
It would also be right in the middle of any conflict between the US and China.
How likely do you think some kind of earthquake or conflict disrupts Taiwanese chip production, and how does that affect timelines?